| Invention Title |
Inventor Name(s) |
|
"Core Fusion" - Reconfigurable Chip Multiprocessor Architecture |
Jose Martinez,
Engin Ipek,
Meyrem Kirman,
Nevin Kirman
|
|
Checkpointed Early Load Retirement - Memory Latency Masking for Microprocessors |
Jose Martinez,
Meyrem Kirman,
Nevin Kirman
|
|
Distributed Architecture for an Intelligent Networking Coprocessor |
Roy Friedman,
Kenneth Birman
|
|
Dynamic Thermal Management in Asynchronous Circuits |
Rajit Manohar,
Filipp Akopyan,
David Fang
|
|
Execution Machines |
Hwa Torng
|
|
Failure Detectors with Epoch Numbers for Fault-Tolerant Distributed Systems |
Marcos Aguilera,
Wei Chen,
Sam Toueg
|
|
Future Execution: A Mechanism to Accelerate Program Execution on Processors with Multiple Hardware Contexts |
Martin Burtscher,
Ilya Ganusov
|
|
Multiple-Issue Static Speculative Instruction Scheduling with Path Tag and Precise Interrupt Handling |
Mayan Moudgill
|
|
Processing Element Optimized for Event-Driven Applications |
Rajit Manohar,
Clinton Kelly, IV
|
|
Software-defined GPS Receiver |
Mark Psiaki,
Paul Kintner,
Brent Ledvina,
Steven Powell
|
|
Transistor with Zero Source-Drain Leakage Current |
Amit Lal,
Sang Kim,
Shankar Radhakrishnan,
Sandip Tiwari,
Norimasa Yoshimizu
|